Double connection in diagram for bind instruction

SysML v2 Questions / Help
1

Hi

I have tried to create a bind between a subsystem the system.

package BIND_Test {
port def power_port;
part def SystemDef {
port power_input :power_port;
}
part def SubSystemDef {
port power_in :power_port;
}
part System : SystemDef {
part sub_system1 : SubSystemDef;
part sub_system2 : SubSystemDef;
bind System.power_input = sub_system1.power_in;
}
}
In syside following diagram is generated.

Diagram
Diagram781×575 23.8 KB

What is the reason for the double connection to sub_system1 and sub_system2 to the power_input port?

2

Hi Andre!

On first inspection, it seems that you may have found a bug! Thanks for reporting this. I’ve raised this internally and will reply next week with the status.

Adam Layne, PhD

3

Just an update: this has been confirmed and raised internally. We’re working on a fix.