How can I configure syside.toml for diagram routing/layout options in Syside CLI?

SysML v2 Questions / Help
1

Hello,

I am using the Syside CLI to generate SVG diagrams from a SysML v2 model, for example:

syside viz element ./ \
  -n "'Model Electronics Basic'::Parts::circuit" \
  -r tree \
  -v interconnection \
  -o _viz_Test.svg

I understand that some visualization defaults can be configured in syside.toml, such as render_style, default view kind, theme, and zoom level.

What I would like to know is whether syside.toml also supports more detailed routing or layout configuration options, for example:

  • orthogonal / Manhattan-style connector routing
  • avoiding overlapping connections
  • controlling edge spacing
  • controlling node spacing
  • choosing port-side placement for connections
  • improving layout for interconnection diagrams

Is there an official list of supported syside.toml keys for diagram layout and routing?

If detailed routing is not configurable through syside.toml, what is the recommended way to influence diagram layout when using syside viz element or syside viz view?

Thanks!

2

Hi Alejandro, currently, we do not support routing/layout customization in the CLI. This is something we are working on.

Is there an official list of supported syside.toml keys for diagram layout and routing?

Modeler CLI v0.10.2 supports the following customizations:

Command Default value Options Description
viz.layout.render_style.<VIEW> * “nested” tree/nested Default render style per view
viz.expose.mode “subtree” subtree/promoted/flat Options for tweaking how expose works
(experimental, more info will be provided in documentation shortly)
viz.labels.show_fork_join_labels true true/false Option to hide labels on fork and join nodes (action flows)
viz.labels.show_decide_merge_labels true true/false Option to hide labels on decide and merge nodes (action flows)
viz.filters.<VIEW>.show_node_heritage_edges * true true/false Option to show/hide inheritance edges (lines) on nodes
viz.filters.<VIEW>.show_port_heritage_edges * false true/false Option to show/hide inheritance edges (lines) on ports
viz.render.zoom_level 3.0 > 0.0 Zoom level of generated PNG and JPEG images (does nto affect SVGs)
viz.style.theme “light” light/dark/light_mono/dark_mono Predefined color themes
viz.style.group.<NAME> ** N/A see below Custom user-defined colors per node

* where <VIEW> can be one of the following: general, interconnection, action_flow, state_transition, sequence.

** You can customize rendering style of specific SysML nodes by constraining formatting options to specific SysML types. For example:

[viz.style.group.blueish]
members      = ["PartUsage", "PortUsage"]
fill_header  = "#60c0ffff"
fill_body    = "#60c0ffff"
stroke       = "#030305ff"
text_primary = "#030305ff"
text_keyword = "#2020ffff"

[viz.style.group.emphasis]
members     = ["ActionUsage"]
stroke      = "#aa0000"
fill_header = "#ffeeee"

where <NAME> is any user defined name (blueish, emphasis), members is a list of SysML types, and values are hexadecimal + transparency color values (#RRGGBBAA).

Best,
Simas

3

Hello Simas,

I have been doing some testing on my side.

Using this .toml configuration file:

[viz.filters.general]
show_node_heritage_edges = false
show_port_heritage_edges = false

[viz.expose]
mode = "promoted"

[viz.style]
theme = "light"

[viz.layout]
render_style.general = "nested"

I have been able to configure some of the default behavior, especially regarding the “heritage edges”, which results in a much cleaner visualization. I have the bad habit of having definitions in the same package as usages. :sweat_smile:

At first, some of the configuration parameters were not doing anything, and then I realized that my viz command was overriding some of the parameters defined in the .toml configuration file. So I changed it to:

syside viz element ./ \
  -n "'Model Electronics Basic'::Parts::circuit" \
  --config _viz_syside.toml \
  -o _viz_Test.svg

Many thanks for the clear explanation. I’ll be looking forward to more layout/routing functionality.